EP910ILC-25 vs EP910JM-40 Comparison
Detailed side-by-side comparison of EP910ILC-25 by Intel and EP910JM-40 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910ILC-25 | EP910JM-40 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | EP910 Classic EPLD | — |
| Macrocells | 24 | 24 |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 25 ns | 40 ns |
| Internal Frequency (fMAX) | [DATA_NEEDED: fMAX rating] | — |
| Logic Blocks | Sum-of-products AND/OR array | — |
| Technology | CMOS EPROM (UV-erasable) | — |
| Configuration Memory | Non-volatile EPROM (windowed ceramic) | — |
| Package | 44-pin JLCC (windowed ceramic) | JLCC-28 (windowed ceramic, J-lead) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | -40C to +85C (industrial) | 0C to +70C (commercial) [DATA_NEEDED: confirm grade] |
| Supply Voltage | 5 V | — |
| Development Tool | Altera MAX+PLUS II (legacy) | — |
| RoHS Status | non_compliant (ceramic windowed package) | [DATA_NEEDED: RoHS status - UV-windowed ceramic package typically not RoHS compliant] |
| Lifecycle Status | Obsolete - last time buy was late 1990s | — |
| Device Family | — | Altera Classic EPLD |
| Series | — | EP910 |
| Logic Type | — | EPLD (UV-Erasable PAL-type) |
| Dedicated Inputs | — | 12 |
| I/O Lines | — | 24 |
| Total Inputs (max) | — | 36 |
| Total Outputs (max) | — | 24 |
| Product Terms | — | 240 |
| External Clock Inputs | — | 2 |
| Process Technology | — | CMOS |
| Programming Method | — | UV erase + EPROM programmer |