EP910LC-30 vs EP910LC-25 Comparison
Detailed side-by-side comparison of EP910LC-30 by Altera and EP910LC-25 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC-30 | EP910LC-25 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocell Count | 24 | — |
| Propagation Delay (tPD) | 30 ns (max) | 25 ns |
| Maximum Toggle Frequency | 62 MHz | — |
| Supply Voltage (VCC) | 5 V (nominal, TTL) | — |
| Process Technology | CMOS (EPROM-based) | — |
| Package Type | PDIP-40 (Plastic DIP, through-hole) | — |
| Operating Temperature Grade | Commercial (0C to +70C) | — |
| I/O Pin Count | 24 | — |
| Dedicated Input Pins | 36 (including I/O) | — |
| Product Terms per Macrocell | Up to 16 | — |
| Programming Technology | UV-erasable EPROM cell | — |
| Development Tool | Altera MAX+PLUS II | — |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Family | — | Altera Classic EPLD |
| Macrocells | — | 24 |
| Logic Gates | — | [DATA_NEEDED: logic gate count] |
| Dedicated Inputs | — | 16 |
| Package | — | 28-pin PLCC (LC suffix) |
| Mounting Type | — | Surface Mount |
| Technology | — | CMOS (EPROM-based) |
| Operating Voltage | — | [DATA_NEEDED: VCC range] |
| Operating Temperature | — | 0C to +70C (commercial) |
| Programmable | — | Yes (EPROM, UV-erasable on windowed variants) |
| I/O Pins | — | [DATA_NEEDED: I/O count] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |