EP910LC-30T vs EP910LC-32 Comparison
Detailed side-by-side comparison of EP910LC-30T by Altera and EP910LC-32 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC-30T | EP910LC-32 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Part Number | EP910LC-30T | — |
| Manufacturer | Altera (Rochester Electronics) | — |
| Device Family | Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 30 ns | — |
| Maximum Operating Frequency | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V |
| Technology | CMOS, UV-erasable / OTP | — |
| User I/O Pins | 36 | — |
| Package | 44-pin PLCC (J-lead) | PLCC-32 |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket or direct solder) |
| Operating Temperature | [DATA_NEEDED: operating temperature] | — |
| Programmable Pins | Bidirectional, tri-state | — |
| Programming Interface | Altera MAX+PLUS II | — |
| RoHS Status | unknown | unknown |
| Lead-Free | unknown | — |
| Number of Macrocells | — | 24 |
| Number of Usable Gates | — | 900 gates (typical) |
| Number of Dedicated Inputs | — | 10 |
| Number of I/O Pins | — | 20 |
| Speed Grade | — | -32 |
| Maximum Toggle Frequency (fMAX) | — | [DATA_NEEDED: fMAX value in MHz for -32 grade] |
| Pin-to-Pin Propagation Delay (tPD) | — | [DATA_NEEDED: tPD in ns for -32 grade] |
| Logic Family | — | Low-power CMOS (LC suffix) |
| Programming Method | — | UV-erasable or one-time programmable (OTP for LC windowless variant) |
| Operating Temperature Range | — | [DATA_NEEDED: commercial or industrial grade] |
| I/O Standard | — | TTL-compatible |
| MSL Level | — | unknown |