EP910LC-30Y vs EP910LC-30T Comparison
Detailed side-by-side comparison of EP910LC-30Y by Altera and EP910LC-30T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC-30Y | EP910LC-30T |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | Altera Classic EPLD | — |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | 450 |
| Pin-to-Pin Delay (tPD) | 30 ns | — |
| Counter Frequency (fMAX) | 100 MHz (family maximum) | — |
| Supply Voltage | 5 V (TTL-compatible) | — |
| Process Technology | CMOS, UV-erasable / OTP | — |
| Package | PLCC-44 | 44-pin PLCC (J-lead) |
| Operating Temperature | Commercial 0C to +70C | [DATA_NEEDED: operating temperature] |
| Speed/Power Grade | LC (low-power, 30ns) | — |
| Processing Flow | Y (extended reliability) | — |
| Logic Compatibility | 100% TTL emulation | — |
| Mounting Type | Surface Mount (PLCC socket) | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status not specified in retrieved data] | unknown |
| Part Number | — | EP910LC-30T |
| Manufacturer | — | Altera (Rochester Electronics) |
| Device Family | — | Classic EPLD |
| Propagation Delay (tPD) | — | 30 ns |
| Maximum Operating Frequency | — | 33.3 MHz |
| Supply Voltage (VCC) | — | 5 V (4.75 V to 5.25 V) |
| Technology | — | CMOS, UV-erasable / OTP |
| User I/O Pins | — | 36 |
| Programmable Pins | — | Bidirectional, tri-state |
| Programming Interface | — | Altera MAX+PLUS II |
| Lead-Free | — | unknown |