EP910LC-40 vs EP910LC-30 Comparison
Detailed side-by-side comparison of EP910LC-40 by Rochester Electronics and EP910LC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 Obsolete
Specification Comparison
| Parameter | EP910LC-40 | EP910LC-30 |
|---|---|---|
| Brand | Rochester Electronics | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Manufacturer | Rochester Electronics (Altera original) | — |
| Device Family | Altera Classic EPLD - EP910 | — |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Usable Gates | 450 | — |
| Macrocells | 24 | — |
| Logic Array Blocks | 2 (12 macrocells each) | — |
| Propagation Delay (tPD) | 40 ns | 30 ns (max) |
| Maximum Toggle Frequency (fMAX) | 25 MHz | — |
| User I/O Pins | 36 | — |
| Dedicated Inputs | 4 | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V (nominal, TTL) |
| Technology | CMOS EPROM | — |
| Package | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) | — |
| Operating Temperature (Commercial) | 0 C to +70 C | — |
| Programming Method | Altera Logic Programmer (PLAD-J), 4-wire serial | — |
| RoHS Status | Not applicable (legacy) | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | Not applicable | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocell Count | — | 24 |
| Maximum Toggle Frequency | — | 62 MHz |
| Process Technology | — | CMOS (EPROM-based) |
| Package Type | — | PDIP-40 (Plastic DIP, through-hole) |
| Operating Temperature Grade | — | Commercial (0C to +70C) |
| I/O Pin Count | — | 24 |
| Dedicated Input Pins | — | 36 (including I/O) |
| Product Terms per Macrocell | — | Up to 16 |
| Programming Technology | — | UV-erasable EPROM cell |
| Development Tool | — | Altera MAX+PLUS II |
| MSL Level | — | [DATA_NEEDED: MSL level] |