EP910LC-40 vs EP910LI-40 Comparison
Detailed side-by-side comparison of EP910LC-40 by Rochester Electronics and EP910LI-40 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 Obsolete
Specification Comparison
| Parameter | EP910LC-40 | EP910LI-40 |
|---|---|---|
| Brand | Rochester Electronics | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Manufacturer | Rochester Electronics (Altera original) | Altera (now Intel PSG) |
| Device Family | Altera Classic EPLD - EP910 | — |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Usable Gates | 450 | — |
| Macrocells | 24 | 24 |
| Logic Array Blocks | 2 (12 macrocells each) | — |
| Propagation Delay (tPD) | 40 ns | 40 ns |
| Maximum Toggle Frequency (fMAX) | 25 MHz | — |
| User I/O Pins | 36 | — |
| Dedicated Inputs | 4 | 12 |
| Supply Voltage (VCC) | 5 V (single supply) | — |
| Technology | CMOS EPROM | Low-power CMOS (L-suffix) |
| Package | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) | PLCC-44 (J-lead, windowed ceramic) |
| Operating Temperature (Commercial) | 0 C to +70 C | — |
| Programming Method | Altera Logic Programmer (PLAD-J), 4-wire serial | — |
| RoHS Status | Not applicable (legacy) | Non-compliant (windowed ceramic PLCC, legacy) |
| Lead-Free Status | Not applicable | — |
| Product Family | — | Classic EPLD - EP910 series |
| Device Type | — | Erasable Programmable Logic Device (EPLD) |
| I/O Pins | — | 24 bidirectional |
| Maximum Logic Inputs | — | 36 |
| Product Terms | — | 240 |
| Operating Temperature | — | -40C to +85C (industrial, I-suffix) |
| Mounting Type | — | Surface Mount (socket-compatible) |
| Programmability | — | UV-erasable, JEDEC-standard algorithm |
| Lifecycle | — | Obsolete - replaced by MAX 7000 / MAX II CPLD family |