EP910LC30T vs EP910LC-30 Comparison
Detailed side-by-side comparison of EP910LC30T by Intel and EP910LC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC30T | EP910LC-30 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | Obsolete |
| Device Family | Altera Classic EPLD | — |
| Logic Capacity | 450 equivalent gates | — |
| Macrocells | 24 | — |
| Propagation Delay | 30 ns (tpd) | — |
| Maximum Frequency | 33.3 MHz | — |
| Supply Voltage | 5 V | — |
| Process Technology | CMOS (LC low-power variant) | CMOS (EPROM-based) |
| Programmable Elements | UV-erasable EPROM | — |
| Package | 44-pin PLCC (J-Lead), Tape and Reel | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | — |
| Mounting Type | Surface Mount | — |
| MSL Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Programming Interface | Altera ByteBlaster-compatible | — |
| Manufacturer | Intel (formerly Altera); currently supplied by Rochester Electronics | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocell Count | — | 24 |
| Propagation Delay (tPD) | — | 30 ns (max) |
| Maximum Toggle Frequency | — | 62 MHz |
| Supply Voltage (VCC) | — | 5 V (nominal, TTL) |
| Package Type | — | PDIP-40 (Plastic DIP, through-hole) |
| Operating Temperature Grade | — | Commercial (0C to +70C) |
| I/O Pin Count | — | 24 |
| Dedicated Input Pins | — | 36 (including I/O) |
| Product Terms per Macrocell | — | Up to 16 |
| Programming Technology | — | UV-erasable EPROM cell |
| Development Tool | — | Altera MAX+PLUS II |