EP910LI-20T vs EP910LI-15 Comparison
Detailed side-by-side comparison of EP910LI-20T by Altera and EP910LI-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-20T | EP910LI-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Family | Classic EPLD (Altera) | — |
| Macrocells | 24 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Dedicated Inputs | 10 | 12 |
| I/O Pins | 20 | — |
| Propagation Delay (tPD) | 20 ns | — |
| Maximum Frequency (fMAX) | 95 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| Programming Technology | CMOS EPROM (UV-erasable) | — |
| Programming Voltage | 21 V | — |
| Package | CDIP-20 (ceramic DIP, through-hole) | 44-terminal J-lead ceramic chip carrier (PQCC44) |
| Speed Grade | -20 | 15 ns |
| Operating Temperature | -40 C to +85 C (industrial) | — |
| Mounting Type | Through-hole | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | unknown |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| Product Type | — | Programmable Logic Device (PLD) |
| Device Family | — | Altera Classic EPLD |
| Part Number | — | EP910LI-15 |
| Supply Voltage Range | — | 4.5 V to 5.5 V |
| Input/Output Lines | — | 24 |
| Total User-Signal Resources | — | 36 |
| Operating Temperature Range | — | -40 °C to +85 °C |
| Technology | — | CMOS |
| Package Pin Count | — | 44 terminals |
| Package Mounting | — | Surface Mount |
| Dielectric/Construction | — | Ceramic |
| REACH Status | — | unknown |
| AEC-Q100 Status | — | not_applicable |
| Lead-Free Status | — | unknown |
| Halogen-Free Status | — | unknown |
| Conflict Minerals Status | — | unknown |