EP910LI-30T vs EP910LC44-30T Comparison

Detailed side-by-side comparison of EP910LI-30T by Altera and EP910LC44-30T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP910LI-30T EP910LC44-30T
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $64.59 $9.75
Family Altera Classic EPLD β€”
Number of Macrocells 24 β€”
Usable Gates 450 β€”
Propagation Delay (tPD) 30 ns 33 ns
Clock-to-Output (tCO) [DATA_NEEDED: tCO] β€”
Maximum Frequency (fMAX) [DATA_NEEDED: fMAX] β€”
Dedicated Inputs 10 12
I/O Pins 24 β€”
Package PQCC-44 (J-lead) PQCC-44 (Plastic Leaded Chip Carrier, J-bend)
Operating Temperature -40C to +85C (Industrial) β€”
Technology CMOS, UV-erasable β€”
Supply Voltage [DATA_NEEDED: VCC] β€”
Mounting Type Surface Mount Surface Mount
Programming Method EPROM (UV-erasable) via Altera Logic Programmer β€”
RoHS Status [DATA_NEEDED: RoHS] β€”
Lead-Free [DATA_NEEDED: Lead-free] β€”
Device Family β€” Classic EPLD
Logic Type β€” PAL-type CMOS EPLD (OT PLD)
Macrocells β€” 24
Product Terms β€” 240
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (nominal 5 V)
I/O Lines β€” 24 (bidirectional)
Total Inputs β€” 36
Total Outputs β€” 24
External Clock Inputs β€” 2
Programming Technology β€” CMOS, UV-erasable (windowed package in family)
Security Bit β€” Programmable (logic readback protection)
Operating Temperature Grade β€” Commercial
Terminal Form β€” J-BEND
Package Code β€” QCCJ

Datasheets & Resources

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