EP910LI-30T vs EP910LC44-30T Comparison
Detailed side-by-side comparison of EP910LI-30T by Altera and EP910LC44-30T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-30T | EP910LC44-30T |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | Altera Classic EPLD | — |
| Number of Macrocells | 24 | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 30 ns | 33 ns |
| Clock-to-Output (tCO) | [DATA_NEEDED: tCO] | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: fMAX] | — |
| Dedicated Inputs | 10 | 12 |
| I/O Pins | 24 | — |
| Package | PQCC-44 (J-lead) | PQCC-44 (Plastic Leaded Chip Carrier, J-bend) |
| Operating Temperature | -40C to +85C (Industrial) | — |
| Technology | CMOS, UV-erasable | — |
| Supply Voltage | [DATA_NEEDED: VCC] | — |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Method | EPROM (UV-erasable) via Altera Logic Programmer | — |
| RoHS Status | [DATA_NEEDED: RoHS] | — |
| Lead-Free | [DATA_NEEDED: Lead-free] | — |
| Device Family | — | Classic EPLD |
| Logic Type | — | PAL-type CMOS EPLD (OT PLD) |
| Macrocells | — | 24 |
| Product Terms | — | 240 |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (nominal 5 V) |
| I/O Lines | — | 24 (bidirectional) |
| Total Inputs | — | 36 |
| Total Outputs | — | 24 |
| External Clock Inputs | — | 2 |
| Programming Technology | — | CMOS, UV-erasable (windowed package in family) |
| Security Bit | — | Programmable (logic readback protection) |
| Operating Temperature Grade | — | Commercial |
| Terminal Form | — | J-BEND |
| Package Code | — | QCCJ |