EP910PC-25 vs EP910PC-30T Comparison
Detailed side-by-side comparison of EP910PC-25 by Altera and EP910PC-30T by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PC-25 | EP910PC-30T |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Product Family | Classic EPLD | — |
| Usable Gates | 900 | 900 |
| Integration Gates (typical) | 4800 | — |
| Macrocells | 24 | 24 |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Maximum Operating Frequency (fMAX) | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V +/- 10% | — |
| Technology | CMOS EPROM | — |
| Package | PDIP-24 (Plastic DIP) | PDIP-40 (Plastic DIP) |
| Pin Count | 24 | — |
| Dedicated Inputs | 10 | 12 |
| Dedicated I/O Pins | 12 | — |
| TTL Compatibility | 100% TTL emulation | — |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Erasure Method | Not erasable in plastic package (windowless) | — |
| Family | — | Altera Classic EPLD |
| Device | — | EP910 |
| Product Terms | — | 240 |
| I/O Pins | — | 24 |
| Propagation Delay (tPD) | — | 30 ns |
| Maximum Clock Frequency (fCNT) | — | 33.3 MHz |
| Process Technology | — | CMOS |
| Supply Voltage | — | 5 V (TTL compatible) |
| Mounting Type | — | Through-Hole |
| Logic Compatibility | — | 100% TTL emulation |
| Programming | — | MAX+PLUS II / UV-erasable |