EP910PC-30T vs EP910PC-20 Comparison
Detailed side-by-side comparison of EP910PC-30T by Intel and EP910PC-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PC-30T | EP910PC-20 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | EP910 |
| Usable Gates | 900 | 900 |
| Macrocells | 24 | — |
| Product Terms | 240 | — |
| Dedicated Inputs | 12 | — |
| I/O Pins | 24 | — |
| Propagation Delay (tPD) | 30 ns | — |
| Maximum Clock Frequency (fCNT) | 33.3 MHz | — |
| Process Technology | CMOS | — |
| Supply Voltage | 5 V (TTL compatible) | — |
| Package | PDIP-40 (Plastic DIP) | PDIP-24 (PC suffix) |
| Mounting Type | Through-Hole | Through-Hole (DIP) |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Logic Compatibility | 100% TTL emulation | — |
| Programming | MAX+PLUS II / UV-erasable | — |
| Macrocell Count | — | [DATA_NEEDED: macrocell count] |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Pin Count | — | 24 |
| Supply Voltage (VCC) | — | 5 V |
| Technology | — | CMOS EPROM (UV-erasable) |
| I/O Compatibility | — | 100% TTL |
| Programming Method | — | EPROM programmer, JEDEC fuse map |
| MSL Level | — | [DATA_NEEDED: MSL level] |
| RoHS Status | — | [DATA_NEEDED: RoHS status] |