EP910PC-30T vs EP910PC-25 Comparison

Detailed side-by-side comparison of EP910PC-30T by Intel and EP910PC-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP910PC-30T EP910PC-25
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family Altera Classic EPLD —
Device EP910 —
Usable Gates 900 900
Macrocells 24 24
Product Terms 240 —
Dedicated Inputs 12 10
I/O Pins 24 —
Propagation Delay (tPD) 30 ns —
Maximum Clock Frequency (fCNT) 33.3 MHz —
Process Technology CMOS —
Supply Voltage 5 V (TTL compatible) —
Package PDIP-40 (Plastic DIP) PDIP-24 (Plastic DIP)
Mounting Type Through-Hole —
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
Logic Compatibility 100% TTL emulation —
Programming MAX+PLUS II / UV-erasable —
Product Family — Classic EPLD
Integration Gates (typical) — 4800
Pin-to-Pin Delay (tPD) — 25 ns
Maximum Operating Frequency (fMAX) — 33.3 MHz
Supply Voltage (VCC) — 5 V +/- 10%
Technology — CMOS EPROM
Pin Count — 24
Dedicated I/O Pins — 12
TTL Compatibility — 100% TTL emulation
Erasure Method — Not erasable in plastic package (windowless)

Datasheets & Resources

Browse All Products Create BOM Request Quote