EPC1LC20-W vs EPC1441LC20 Comparison

Detailed side-by-side comparison of EPC1LC20-W by Altera and EPC1441LC20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPC1LC20-W EPC1441LC20
Brand Altera Altera
Category Memory ICs Memory ICs
Lifecycle Status Obsolete Active
Memory Type OTP (One-Time Programmable) Configuration PROM OTP configuration PROM
Memory Size 1 Mbit —
Configuration Clock (DCLK) 8 MHz maximum —
Supply Voltage 3.3 V and 5.0 V —
Interface Altera serial configuration (DCLK / DATA / nCONFIG / nSTATUS) —
In-System Programming Yes - IEEE 1149.1 (JTAG) ISP at 3.3 V / 5.0 V —
Package 20-PLCC J-lead (9x9 mm) 20-PLCC
Lead Finish Pb-free (matte tin) - "-W" suffix —
Daisy-Chain Support Yes - multiple EPC1 / EPC2 devices cascade to program larger FPGAs —
Compression Support Yes - stores compressed Altera FPGA bitstreams —
Operating Temperature Range [DATA_NEEDED: operating temperature range] 0 °C to 70 °C
Programming Cycles 1 (OTP) —
Target FPGA Families Cyclone, FLEX 6000 / 10K / 10KE, ACEX 1K, APEX 20K, Mercury —
RoHS Status Compliant (Pb-free -W finish) [DATA_NEEDED: RoHS status]
Mounting Type Surface Mount (PLCC socket or direct solder) —
Configuration Memory Capacity — 440 kb
Configuration Memory Capacity (Alternate Listing) — 400 kbit
Configuration Interface — Serial
Configuration Performance — 8 MHz
Target Device — SRAM-based LUT devices and FPGAs
Programmability — One-time programmable
Package Dimensions — 9 mm x 9 mm
Package Code — QCCJ
Package Shape — Square
Number of Terminals — 20
Temperature Grade — Commercial
Configuration Device Family — EPC14
Typical Use — FPGA configuration memory
REACH Status — [DATA_NEEDED: REACH status]

Datasheets & Resources

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