EPC1LC20-W vs EPC144LC20 Comparison
Detailed side-by-side comparison of EPC1LC20-W by Altera and EPC144LC20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPC1LC20-W
EPC1LC20-W - 1Mb OTP Configuration PROM 20-PLCC | Intel/Altera
EPC1LC20-W ObsoleteIntel
EPC144LC20
EPC144LC20 - 144KB Serial Config PROM, 20-LCC | Intel (Altera)
EPC144LC20 β Last Time BuySpecification Comparison
| Parameter | EPC1LC20-W | EPC144LC20 |
|---|---|---|
| Brand | Altera | Intel |
| Category | Memory ICs | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $7.10 |
| Memory Type | OTP (One-Time Programmable) Configuration PROM | β |
| Memory Size | 1 Mbit | β |
| Configuration Clock (DCLK) | 8 MHz maximum | β |
| Supply Voltage | 3.3 V and 5.0 V | β |
| Interface | Altera serial configuration (DCLK / DATA / nCONFIG / nSTATUS) | β |
| In-System Programming | Yes - IEEE 1149.1 (JTAG) ISP at 3.3 V / 5.0 V | β |
| Package | 20-PLCC J-lead (9x9 mm) | 20-pin LCC (Leadless Chip Carrier, JLCC-20) |
| Lead Finish | Pb-free (matte tin) - "-W" suffix | β |
| Daisy-Chain Support | Yes - multiple EPC1 / EPC2 devices cascade to program larger FPGAs | β |
| Compression Support | Yes - stores compressed Altera FPGA bitstreams | β |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | β |
| Programming Cycles | 1 (OTP) | β |
| Target FPGA Families | Cyclone, FLEX 6000 / 10K / 10KE, ACEX 1K, APEX 20K, Mercury | β |
| RoHS Status | Compliant (Pb-free -W finish) | [DATA_NEEDED: RoHS compliance status per Intel PCN] |
| Mounting Type | Surface Mount (PLCC socket or direct solder) | Surface Mount |
| Memory Capacity | β | 144 Kbit |
| Memory Organization | β | Serial (one-time programmable) |
| Interface Type | β | Altera Serial Configuration (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| Programming Method | β | In-system via JTAG (IEEE 1149.1 / ByteBlaster / USB-Blaster) |
| Supply Voltage (VCC) | β | 3.0 V to 5.5 V |
| Operating Temperature | β | -40C to +85C (industrial) |
| Configuration Time (typical) | β | [DATA_NEEDED: configuration time at DCLK = 10 MHz] |
| Active Supply Current | β | [DATA_NEEDED: ICC active] |
| Standby Supply Current | β | [DATA_NEEDED: ICC standby] |
| Pin Count | β | 20 |
| Supported FPGA Families | β | Altera FLEX 6000 / 8000 / 10K, ACEX 1K, MAX 3000 / 7000, APEX 20K |
| MSL Level | β | 3 (168 hours) |
| Lead-Free | β | Yes |
| Halogen-Free | β | [DATA_NEEDED] |
| JTAG Compliance | β | IEEE Std 1149.1 |