EPC1LC20-WCEC52 vs EPC1LC120 Comparison
Detailed side-by-side comparison of EPC1LC20-WCEC52 by Altera and EPC1LC120 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC1LC20-WCEC52 | EPC1LC120 |
|---|---|---|
| Brand | Altera | Altera |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Active |
| Memory Type | OTP Configuration PROM (Anti-fuse) | Serial Configuration Memory (Flash-based, non-volatile) |
| Memory Size | 1 Mbit (1,048,576 bits) | — |
| Organization | 212,942 x 1 bit | — |
| Interface | Serial (Altera FPP/PS configuration protocol) | Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| Configuration Clock (DCLK) | 8 MHz maximum | — |
| Supply Voltage (VCC) | 3.3 V | — |
| I/O Voltage Tolerance | 5.0 V (FPGA interface) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Programmability | One-Time Programmable (OTP) | — |
| Operating Temperature | -40C to +85C (industrial) | — |
| Package | 20-pin PLCC (J-lead, through-hole, 9x9 mm) | LQFP-120 (Low-profile Quad Flat Pack) |
| Package Mounting | Through-hole (also accepts PLCC socket) | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Compatible FPGA Families | Cyclone, Stratix, APEX, ACEX, MAX series | — |
| Programming Interface | JTAG (IEEE Std 1149.1) ISP | — |
| Pin Count | 20 | — |
| Lifecycle Status | Obsolete (recommended replacement: EPCQ family or newer serial config devices) | — |
| Memory Density | — | 1 Mbit |
| Serial Clock Frequency (DCLK) | — | 8 MHz |
| Supported FPGA Families | — | APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class |
| Mounting Type | — | Surface Mount |
| Operating Temperature Range | — | [DATA_NEEDED: operating temperature range] |
| Supply Voltage | — | [DATA_NEEDED: VCC range] |
| Programming | — | Factory / JTAG via Altera programming tools |
| MSL Level | — | [DATA_NEEDED: MSL rating] |
| Configuration Mode | — | Serial configuration of SRAM-based FPGAs |
| Compatible Bitstream Width | — | Serial |