EPC2LC20-U vs EPC22LC20 Comparison

Detailed side-by-side comparison of EPC2LC20-U by Altera and EPC22LC20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPC2LC20-U EPC22LC20
Brand Altera Intel
Category Memory ICs FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Memory Type Configuration PROM (Flash, in-system programmable) —
Memory Size 1.6 Mbit 1.6 Mbit
Interface Serial (4-wire Altera configuration) + JTAG (IEEE 1149.1) —
Max Configuration Clock 10 MHz —
Supply Voltage (VCC) 3.3 V (3.0 V to 3.6 V) —
Programmable In-system via JTAG —
Cascade Support Yes (multi-PROM for larger bitstreams) —
Package 20-PLCC (9x9) —
Mounting Type Surface Mount Surface Mount (PLCC socket compatible)
Operating Temperature [DATA_NEEDED: full operating temperature range] 0 C to +70 C (commercial)
Supported FPGA Families ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K ACEX 1K, APEX II, APEX 20K, FLEX 10K
JTAG Support Yes (IEEE 1149.1 boundary-scan) —
RoHS Status [DATA_NEEDED: RoHS compliance status] —
Lead-Free [DATA_NEEDED: lead-free status] —
MSL Level [DATA_NEEDED: moisture sensitivity level] —
Function — In-System Programmable Configuration PROM for SRAM-based FPGAs
Programmable Type — In System Programmable (IEEE 1532 / Jam STAPL)
Supply Voltage - Low Range — 3.0 V to 3.6 V
Supply Voltage - High Range — 4.75 V to 5.25 V
Configuration Interface — Altera serial configuration (DCLK / DATA0 / nSTATUS / CONF_DONE)
Programming Interface — JTAG (IEEE 1149.1 / IEEE 1532)
Package / Case — 20-LCC (J-Lead, 9 x 9 mm)
Packaging — Tube
Minimum DC Input Voltage — -0.3 V
Input Overshoot Tolerance — 7.0 V for <100 mA, <20 ns no-load
Input Undershoot Tolerance — -2.0 V for <100 mA, <20 ns no-load
Lead-Free / RoHS — [DATA_NEEDED: lead-free status not in verified data]

Datasheets & Resources

Browse All Products Create BOM Request Quote