EPF10K100EQC240-3 vs EPF10K130EQC240-3N Comparison
Detailed side-by-side comparison of EPF10K100EQC240-3 by Intel and EPF10K130EQC240-3N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPF10K130EQC240-3N - 130K Gate FLEX-10KE FPGA, 240-PQFP | Intel
EPF10K130EQC240-3N ⚠ Last Time BuySpecification Comparison
| Parameter | EPF10K100EQC240-3 | EPF10K130EQC240-3N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Last Time Buy |
| Family | FLEX 10KE | FLEX-10KE® |
| Logic Elements / Cells | 4,992 | — |
| Total Gates | 100,000 typical | — |
| Logic Array Blocks (LABs) | 624 | 832 |
| Total RAM Bits | 49,152 | 65,536 bits |
| Embedded System Blocks (ESBs) | 12 | — |
| User I/O Count | 189 | — |
| Number of I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| Core Voltage (VCCINT) | 2.5 V (±0.25 V) | — |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V | — |
| Operating Frequency (max) | 200 MHz | — |
| Process Technology | 0.25 µm SRAM | — |
| Package | 240-pin PQFP (32.1 × 32.1 mm) | 240-BQFP (PQFP), 32 x 32 mm |
| Speed Grade | -3 (fastest commercial) | — |
| PLL Count | 4 | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| Configuration Method | SRAM + JTAG / PS / AS modes | SRAM (volatile, requires external PROM) |
| Operating Temperature | 0 °C to +70 °C (commercial) | 0 °C to +70 °C (Commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant |
| Series | — | FLEX 10KE |
| Logic Elements | — | 6,656 |
| Number of I/O Pins | — | 186 |
| Number of Gates | — | 342,000 (typical 49,152) |
| Maximum Frequency | — | 200 MHz |
| Core Voltage | — | 2.5 V (2.375 V to 2.625 V) |
| Technology | — | 0.22 µm CMOS, SRAM-based |
| Lead Finish | — | Gull-wing, lead-free (per Altera datasheet) |
| PLLs | — | 4 |
| Embedded Multipliers | — | Yes (EABs configurable as multipliers) |
| Supply Voltage I/O | — | 3.3 V LVTTL/LVCMOS, 5 V tolerant inputs |