EPF10K130EFC672-2 vs EPF10K200EBI600-2N Comparison

Detailed side-by-side comparison of EPF10K130EFC672-2 by Altera and EPF10K200EBI600-2N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPF10K200EBI600-2N EPF10K200EBI600-2N - 200K Gates FLEX 10KE FPGA | Intel

EPF10K200EBI600-2N - 200K Gates FLEX 10KE FPGA | Intel

EPF10K200EBI600-2N Obsolete

Specification Comparison

Parameter EPF10K130EFC672-2 EPF10K200EBI600-2N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status NRND Obsolete
Family FLEX 10KE FLEX 10KE
Logic Elements / Cells 6,656 —
Total Gates ~130,000 —
Logic Array Blocks (LABs) 832 —
Embedded Memory (RAM bits) 65,536 —
Maximum User I/Os 413 —
Number of I/O Pins 672 (package pins) —
Package 672-ball FineLine BGA 600-ball BGA (45 mm x 45 mm, 1.27 mm pitch)
Process Technology 0.22 µm CMOS —
Core Supply Voltage 2.5 V 2.5 V (2.3 V to 2.7 V)
Propagation Delay (typ.) 0.6 ns —
Internal Operating Frequency (max) 333.33 MHz —
Operating Temperature 0 °C to +70 °C (Commercial) 0 °C to +70 °C (commercial)
Speed Grade -2 —
Programming Method SRAM-based, JTAG (IEEE 1149.1) —
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
Typical Gates — 200,000
Maximum System Gates — 513,000
Logic Elements (LEs) — 9,984
Embedded Array Blocks (EABs) — 12
Total RAM Bits — 98,304
User I/O Pins — 470
Dedicated Inputs — 6
Technology / Process — 0.22 µm CMOS SRAM
I/O Supply Voltage — 2.5 V / 3.3 V (5 V tolerant I/O available)
Propagation Delay — 0.4 ns to 0.6 ns (per LE)
Maximum Internal Frequency — 200 MHz
Configuration Method — SRAM, JTAG (IEEE 1149.1), serial configuration EPROM
MSL Level — [DATA_NEEDED: moisture sensitivity level]
RoHS Status — [DATA_NEEDED: RoHS compliance status]

Datasheets & Resources

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