EPF10K200EFC672-1 vs EPF10K200SFC672-2 Comparison

Detailed side-by-side comparison of EPF10K200EFC672-1 by Intel and EPF10K200SFC672-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPF10K200EFC672-1 EPF10K200EFC672-1 - 200K Gates FLEX-10KE FPGA | Intel

EPF10K200EFC672-1 - 200K Gates FLEX-10KE FPGA | Intel

EPF10K200EFC672-1 ⚠ Last Time Buy

Specification Comparison

Parameter EPF10K200EFC672-1 EPF10K200SFC672-2
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy NRND
Family FLEX-10KE —
Logic Elements 9,984 9,984
Typical Gates 200,000 —
User I/Os 470 —
Embedded Memory (bits) 98,304 98,304
Logic Array Blocks (LABs) 1,248 1,248
Package 672-FBGA (FineLine BGA), 27x27 mm, 1.27 mm pitch 672-pin FineLine BGA (FBGA), 45 × 45 mm, 1.27 mm pitch
Process Technology CMOS, SRAM-based 0.22 µm CMOS
Propagation Delay 0.4 ns —
Operating Temperature 0 C to 70 C (Commercial) 0 °C to +70 °C (Commercial)
Speed Grade -1 -2
Mounting Type Surface Mount —
I/O Standards Supported LVTTL, LVCMOS, PCI, True-LVDS —
Core Voltage 2.5 V (typical, FLEX-10KE) —
RoHS Status Compliant [DATA_NEEDED: RoHS compliance status]
Supply Voltage - Max 3.3 V (I/O) —
MSL Level 3 (168 hours) —
Series — FLEX 10KE
System Gates — 200,000
User I/O Pins — 470
Core Supply Voltage — 2.5 V (2.375 V to 2.625 V)
I/O Supply Voltage — MultiVolt 2.5 V / 3.3 V / 5.0 V
Internal Propagation Delay — 0.4 ns
Maximum Operating Frequency — 200 MHz
Configuration Method — SRAM-based, passive parallel asynchronous
Boundary Scan — IEEE 1149.1 (JTAG)
On-chip PLL — Yes

Datasheets & Resources

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