EPF10K30RC240-3 vs EPF10K30AQI240-1 Comparison

Detailed side-by-side comparison of EPF10K30RC240-3 by Altera and EPF10K30AQI240-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPF10K30RC240-3 EPF10K30AQI240-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete NRND
Family FLEX 10K FLEX 10KA
Typical Gates 30,000 30,000
Logic Elements (LEs) 1,728 —
Logic Array Blocks (LABs) 216 —
Embedded Array Blocks (EABs) 6 6
Total RAM Bits 12,288 —
User I/O Pins 189 —
Process Technology 0.42 um CMOS, SRAM-based 0.42 um CMOS SRAM
Core Supply Voltage 5.0 V (VCCINT) 3.3 V
I/O Supply Voltage 3.3 V or 5.0 V (multiVolt I/O) —
Maximum Internal Frequency 125 MHz (speed grade -3) —
Propagation Delay 0.6 ns typical 11 ns
Package 240-RQFP / 240-BFQFP Exposed Pad 240-pin PQFP (Plastic Quad Flat Pack)
Operating Temperature 0C to +70C (Commercial) -40 C to +85 C (Industrial)
Configuration Method Serial / parallel PROM, JTAG —
JTAG Support Yes (IEEE 1149.1 boundary scan) —
Mounting Type Surface Mount —
RoHS Status Contains lead (non-RoHS) —
Device Logic Elements — 1,728
Maximum User I/O — 189
Dedicated Inputs — 4
Total Inputs — 193
Maximum RAM Bits — 24,576
Maximum Clock Frequency — 769.23 MHz
I/O Supply Voltage (multiVolt I/O) — 2.5 V / 3.3 V / 5.0 V
Terminal Pitch — 0.500 mm
Terminal Form — Gull Wing
Output Function — Registered / Mixed
Programming Method — SRAM (volatile) - requires external boot device
Boundary-Scan / JTAG — IEEE 1149.1 compliant

Datasheets & Resources

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