EPF8820ARC208-2 vs EPF8820ARC208-3N Comparison

Detailed side-by-side comparison of EPF8820ARC208-2 by Altera and EPF8820ARC208-3N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPF8820ARC208-2 EPF8820ARC208-3N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family FLEX 8000 FLEX 8000
Logic Cells 672 —
Usable Gates 8,000 (typical) 8,000
Registers 1,500 (max) —
User I/O Pins 152 —
Package 208-pin RQFP / BFQFP with exposed pad 208-pin RQFP / BFQFP Exposed Pad (28x28 mm)
Process Technology 0.42 µm CMOS 0.42 µm CMOS
Supply Voltage (Core) 5 V —
I/O Voltage (MultiVolt) 3.3 V or 5.0 V —
Speed Grade -2 -3
Max Internal Frequency 125 MHz —
Configuration Method SRAM - serial EPC device, parallel EPROM, or microcontroller —
In-Circuit Reconfigurable Yes (ICR) —
Boundary-Scan / JTAG Yes —
Operating Temperature Commercial (0 °C to +70 °C) —
Mounting Type Surface Mount —
RoHS Status [DATA_NEEDED: rohs_status] unknown
Device Type — Field Programmable Gate Array (FPGA)
Logic Elements — 672
Logic Array Blocks (LABs) — 672 / 10 ≈ 67 LABs
FlipFlops — 152
Maximum Operating Frequency — 125 MHz
Propagation Delay — 5 ns (speed grade -3)
Supply Voltage (VCCINT) — 4.75 V to 5.25 V (5 V nominal)
User I/O Voltage — 3.3 V or 5 V (selectable)
User I/O Count — 152
Configuration Memory — SRAM (volatile, external configuration device required)
Configuration Devices — EPC1, EPC1213, EPC1064, EPC1441
In-System Reconfigurability — Yes (ICR via configuration device or controller)
JTAG Support — Yes (boundary-scan + configuration)

Datasheets & Resources

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