EPM240GT100C4N vs EPM240GT100C5 Comparison
Detailed side-by-side comparison of EPM240GT100C4N by Intel and EPM240GT100C5 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM240GT100C4N
EPM240GT100C4N - MAX II CPLD, 192 Macro Cells, TQFP-100 | Intel
EPM240GT100C4N β ActiveIntel
EPM240GT100C5
EPM240GT100C5 - MAX II CPLD, 240 LE, 192 Macrocells | Intel
EPM240GT100C5 β ActiveSpecification Comparison
| Parameter | EPM240GT100C4N | EPM240GT100C5 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $5.30 | $4.35 |
| Family | MAX II | MAX II G |
| Logic Elements | 240 | 240 |
| Macro Cells | 192 | β |
| Maximum User I/O | 80 | β |
| On-chip Flash Memory | 8 Kbits | β |
| Core Voltage | 1.8 V | β |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | β |
| Maximum Operating Frequency | 247.5 MHz | [DATA_NEEDED: fMAX internal] |
| Propagation Delay (tPD) | 6.1 ns | β |
| Speed Grade | C4 | β |
| Process Technology | 0.18 Β΅m 6-layer metal flash | β |
| Package | TQFP-100 (16 Γ 16 mm, 0.5 mm pitch) | 100-pin TQFP (14 x 14 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Programmability | JTAG (IEEE 1149.1) ISP | β |
| RoHS Status | Lead-Free / Compliant | Compliant |
| Series | β | MAX II |
| Equivalent Macrocells | β | 192 |
| User I/O Pins | β | 80 |
| Logic Blocks / LABs | β | 24 |
| Pin-to-Pin Delay (tPD) | β | 4.7 ns (C5 speed grade) |
| User Flash Memory (UFM) | β | 8 Kbits |
| Programmable Type | β | In-System Programmable (Flash) |
| Core Supply Voltage (VCCINT) | β | 1.71 V to 1.89 V (1.8 V typical) |
| I/O Supply Voltage (VCCIO) | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Operating Temperature | β | 0C to +85C (commercial) |
| MSL Level | β | 3 (168 hours) |
| JTAG / ISP | β | Yes (IEEE 1532 compliant) |