EPM240GT100C5 vs EPM240T100C5 Comparison
Detailed side-by-side comparison of EPM240GT100C5 by Intel and EPM240T100C5 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM240GT100C5 | EPM240T100C5 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.35 | $6.20 |
| Series | MAX II | β |
| Family | MAX II G | MAX II |
| Logic Elements | 240 | 240 |
| Equivalent Macrocells | 192 | β |
| User I/O Pins | 80 | β |
| Logic Blocks / LABs | 24 | β |
| Pin-to-Pin Delay (tPD) | 4.7 ns (C5 speed grade) | β |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX internal] | β |
| User Flash Memory (UFM) | 8 Kbits | β |
| Programmable Type | In-System Programmable (Flash) | β |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V typical) | β |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | β |
| Operating Temperature | 0C to +85C (commercial) | 0C to +85C (Commercial) |
| Package | 100-pin TQFP (14 x 14 mm) | 100-pin TQFP (14 mm Γ 14 mm Γ 1 mm) |
| Mounting Type | Surface Mount | β |
| MSL Level | 3 (168 hours) | β |
| RoHS Status | Compliant | β |
| JTAG / ISP | Yes (IEEE 1532 compliant) | β |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macrocells | β | 192 |
| Maximum User I/O Pins | β | 80 |
| Non-volatile Memory | β | 8 Kbits (embedded Flash) |
| Pin-to-Pin Logic Delay (tPD1) | β | 4.7 ns |
| Maximum Internal Frequency | β | 201.1 MHz |
| Process Technology | β | 0.18 Β΅m, 6-layer metal Flash |
| Core Supply Voltage | β | 2.5 V / 3.3 V |
| I/O Voltage Support | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) |
| I/O Banks | β | 4 |
| Programming Interface | β | JTAG (IEEE 1149.1) / ISP |
| Chip-wide Output Enable | β | DEV_OE pin |