EPM240GT100C5N vs EPM240T100A5N Comparison
Detailed side-by-side comparison of EPM240GT100C5N by Altera and EPM240T100A5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM240GT100C5N | EPM240T100A5N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Family | MAX II | MAX II |
| Series | EPM240 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements (LEs) | 240 | — |
| Macrocells | 192 | — |
| User I/Os | 80 | — |
| Pin-to-Pin Delay (tPD) | 4.7 ns | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Core Supply Voltage (VCCINT) | 2.5 V or 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Operating Temperature | 0C to +85C (Commercial) | 0C to +85C (commercial, "A5N" suffix) |
| Package | 100-pin TQFP (T100) | 100-pin TQFP (14 x 14 x 1.0 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Programmable Type | In-System Programmable (ISP) via JTAG | — |
| Configuration Memory | Non-volatile Flash (instant-on) | On-chip Flash (instant-on) |
| MSL Level | 3 | — |
| RoHS Status | Compliant | Compliant (Pb-free) |
| Macro Cells | — | 192 |
| Logic Elements (LE) | — | 240 |
| User I/O Count | — | 80 |
| Pin-to-Pin Logic Delay (tPD) | — | 4.7 ns |
| Maximum Internal Frequency | — | 201.1 MHz |
| Supply Voltage | — | 2.5 V / 3.3 V |
| I/O Bank Count | — | 4 (multi-voltage) |
| Process Technology | — | 0.18 µm |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |