EPM240GT100I5N vs EPM240GT100I5 Comparison
Detailed side-by-side comparison of EPM240GT100I5N by Altera and EPM240GT100I5 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM240GT100I5N
EPM240GT100I5N - 240-LE MAX II CPLD, 4.7ns, 100-TQFP | Intel
EPM240GT100I5N β ActiveIntel
EPM240GT100I5
EPM240GT100I5 - MAX II CPLD, 240 LE, 80 I/O, TQFP-100 | Intel
EPM240GT100I5 β ActiveSpecification Comparison
| Parameter | EPM240GT100I5N | EPM240GT100I5 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $6.31 | $6.10 |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Family | MAX II | MAX II |
| Logic Elements (LEs) | 240 | β |
| Equivalent Macrocells | 192 | 192 |
| User I/Os | 80 | β |
| Propagation Delay (tPD) | 4.7 ns | 7.5 ns |
| Internal Performance (fMAX) | 304 MHz | β |
| Embedded Non-Volatile Memory | 8 Kbits user Flash | β |
| Process Technology | 0.18 Β΅m 6-layer-metal Flash CMOS | 0.18 um, 6-layer-metal flash |
| Supply Voltage - Core (VCCINT) | 1.71 V to 1.89 V (3.3 V tolerant for MAX II G variant) | β |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V MultiVolt I/O | β |
| Programming Interface | JTAG (IEEE 1149.1) ISP | JTAG (IEEE 1149.1) / ISP |
| Package | 100-pin TQFP (14x14 mm, 0.5 mm pitch) | TQFP-100 (GT100) |
| Operating Temperature | -40 Β°C to +100 Β°C (Industrial) | -40C to +100C (industrial) |
| Lead-Free / RoHS | Yes (suffix N) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Logic Elements | β | 240 |
| User I/O Pins | β | 80 |
| User Flash Memory (UFM) | β | 8 Kbits |
| Package Body Size | β | 16 mm x 16 mm |
| Lead Pitch | β | 0.50 mm |
| Supply Voltage (Core) | β | 3.0 V to 3.6 V (VCCINT) |
| I/O Voltage (VCCIO) | β | 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| RoHS Status | β | Compliant |