EPM240T100C5 vs EPM240GT100C5 Comparison

Detailed side-by-side comparison of EPM240T100C5 by Altera and EPM240GT100C5 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM240T100C5

EPM240T100C5 - MAX II CPLD, 192 Macrocells, 100-TQFP | Altera

EPM240T100C5 βœ“ Active
Intel
EPM240GT100C5

EPM240GT100C5 - MAX II CPLD, 240 LE, 192 Macrocells | Intel

EPM240GT100C5 βœ“ Active

Specification Comparison

Parameter EPM240T100C5 EPM240GT100C5
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $6.20 $4.35
Family MAX II MAX II G
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 192 β€”
Maximum User I/O Pins 80 β€”
Logic Elements 240 240
Non-volatile Memory 8 Kbits (embedded Flash) β€”
Pin-to-Pin Logic Delay (tPD1) 4.7 ns β€”
Maximum Internal Frequency 201.1 MHz β€”
Process Technology 0.18 Β΅m, 6-layer metal Flash β€”
Core Supply Voltage 2.5 V / 3.3 V β€”
I/O Voltage Support 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) β€”
I/O Banks 4 β€”
Package 100-pin TQFP (14 mm Γ— 14 mm Γ— 1 mm) 100-pin TQFP (14 x 14 mm)
Programming Interface JTAG (IEEE 1149.1) / ISP β€”
Operating Temperature 0C to +85C (Commercial) 0C to +85C (commercial)
Chip-wide Output Enable DEV_OE pin β€”
Series β€” MAX II
Equivalent Macrocells β€” 192
User I/O Pins β€” 80
Logic Blocks / LABs β€” 24
Pin-to-Pin Delay (tPD) β€” 4.7 ns (C5 speed grade)
Maximum Operating Frequency β€” [DATA_NEEDED: fMAX internal]
User Flash Memory (UFM) β€” 8 Kbits
Programmable Type β€” In-System Programmable (Flash)
Core Supply Voltage (VCCINT) β€” 1.71 V to 1.89 V (1.8 V typical)
I/O Supply Voltage (VCCIO) β€” 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt)
Mounting Type β€” Surface Mount
MSL Level β€” 3 (168 hours)
RoHS Status β€” Compliant
JTAG / ISP β€” Yes (IEEE 1532 compliant)

Datasheets & Resources

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