EPM240T100C5N vs EPM240GT100C5N Comparison
Detailed side-by-side comparison of EPM240T100C5N by Intel and EPM240GT100C5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM240T100C5N | EPM240GT100C5N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Family | MAX II | MAX II |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | 240 | 240 |
| Equivalent Macrocells | 192 | — |
| On-Chip User Flash | 8 Kbits | — |
| Maximum User I/O Pins | 80 | — |
| Number of I/O Banks | 4 | — |
| Pin-to-Pin Delay (speed grade 5) | 4.7 ns | — |
| Maximum Internal Frequency | 201.1 MHz | — |
| Process Technology | 0.18 µm, 6-layer-metal flash | — |
| Core Supply Voltage (VCCINT) | 2.5 V / 3.3 V | 2.5 V or 3.3 V |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Operating Temperature | 0 °C to +85 °C (commercial, 'C' suffix) | 0C to +85C (Commercial) |
| Package | 100-pin TQFP (T100), 14x14 mm | 100-pin TQFP (T100) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Compliant (lead-free) | Compliant |
| Series | — | EPM240 |
| Macrocells | — | 192 |
| User I/Os | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| User Flash Memory (UFM) | — | 8 Kbits |
| Programmable Type | — | In-System Programmable (ISP) via JTAG |
| Configuration Memory | — | Non-volatile Flash (instant-on) |
| MSL Level | — | 3 |