EPM3032ALC-44-10N vs EPM3032ALC44-10N Comparison

Detailed side-by-side comparison of EPM3032ALC-44-10N by Altera and EPM3032ALC44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3032ALC-44-10N EPM3032ALC-44-10N - MAX 3000A CPLD, 32MC, 10ns, 44-PLCC | Altera

EPM3032ALC-44-10N - MAX 3000A CPLD, 32MC, 10ns, 44-PLCC | Altera

EPM3032ALC-44-10N ⚠ Last Time Buy

Specification Comparison

Parameter EPM3032ALC-44-10N EPM3032ALC44-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy NRND
Family MAX 3000A MAX 3000A
Product Type CPLD - Complex Programmable Logic Device CPLD (Complex Programmable Logic Device)
Macrocells 32 32
Logic Array Blocks (LABs) 2 2
User I/O Pins 34 34
Gates 600 —
Pin-to-Pin Logic Delay (tPD) 4.5 ns —
Counter Frequency (max) 227.3 MHz —
Speed Grade -10 (10 ns) —
Supply Voltage (Core) 3.3 V —
I/O Logic Compatibility 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
Programming Interface JTAG (IEEE Std. 1149.1) / ISP (IEEE Std. 1532) —
Configuration Memory EEPROM (non-volatile) —
Package 44-pin PLCC 44-pin PLCC (J-Lead, surface mount)
Operating Temperature 0C to +70C (commercial, -N suffix) [DATA_NEEDED: industrial/commercial range]
Mounting Type Surface Mount (PLCC socket compatible) Surface Mount
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: compliant or non-compliant]
Lead-Free [DATA_NEEDED: lead-free status] —
Logic Gates — 600 gates
Propagation Delay (tPD) — 10 ns
Internal fMAX — 103.1 MHz
Supply Voltage (VCCINT) — 3.3 V
I/O Voltage (VCCIO) — 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O)
Technology — CMOS EEPROM-based
In-System Programmability — Yes, via IEEE 1149.1 JTAG
ISP Standard Compliance — IEEE Std. 1532
Boundary-Scan Test (BST) — Yes, IEEE 1149.1 compliant

Datasheets & Resources

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