EPM3032ALC44-7 vs EPM3032ALC44-4N Comparison

Detailed side-by-side comparison of EPM3032ALC44-7 by Altera and EPM3032ALC44-4N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3032ALC44-7 EPM3032ALC44-4N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Active
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Logic Elements / Macrocells 32 macrocells —
Logic Array Blocks (LABs) 2 2
System Gates 600 —
Number of User I/O Pins 34 —
Global Clocks 2 —
Propagation Delay (tPD1, max) 7.5 ns —
Maximum Internal Frequency (fMAX) 138.9 MHz —
Supply Voltage (VCCINT / VCCIO) 3.3 V —
I/O Tolerant Voltage 2.5 V / 3.3 V / 5.0 V (MultiVolt) —
Program Memory Type EEPROM —
In-System Programming (ISP) Yes - IEEE 1149.1 JTAG —
Operating Temperature 0 °C to +70 °C (Commercial) [DATA_NEEDED: industrial/commercial grade]
Package 44-pin PLCC (J-Lead), 16.59 x 16.59 mm, 3.81 mm height 44-pin PLCC (J-Lead)
Mounting Type Surface Mount Surface Mount
RoHS Status Not Compliant (per Arrow listing) [DATA_NEEDED: from datasheet]
Part Status Obsolete —
ECCN EAR99 —
Macrocells — 32
Usable Gates — 600
User I/O Pins — 34
Pin-to-Pin Delay (tPD) — 4.5 ns
Maximum Counter Frequency (fCNT) — 227.3 MHz
Core Supply Voltage (VCCINT) — 3.3 V
I/O Supply Voltage (VCCIO) — 2.5 V / 3.3 V / 5.0 V (MultiVolt)
Programmability — EEPROM (non-volatile), IEEE 1149.1 JTAG ISP, IEEE 1532 compliant

Datasheets & Resources

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