EPM3032ATC44-10 vs EPM3032ATC-44-10N Comparison
Detailed side-by-side comparison of EPM3032ATC44-10 by Altera and EPM3032ATC-44-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3032ATC44-10
EPM3032ATC44-10 - 32-Macrocell 10ns CPLD 3.3V TQFP-44 | Altera
EPM3032ATC44-10 NrndIntel
EPM3032ATC-44-10N
EPM3032ATC-44-10N - MAX 3000A CPLD, 32 Macrocells, 44-TQFP | Intel
EPM3032ATC-44-10N β ActiveSpecification Comparison
| Parameter | EPM3032ATC44-10 | EPM3032ATC-44-10N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.78 | $1.10 |
| Series | MAX 3000A | β |
| Family | CPLD MAX 3000A | MAX 3000A |
| Number of Macrocells | 32 | β |
| Number of Logic Array Blocks (LABs) | 2 | β |
| Number of Usable Gates | 600 | β |
| Number of I/O Pins | 34 | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Internal Frequency | 227.3 MHz | β |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | 3.3 V |
| I/O Voltage Tolerance | MultiVolt (1.8 V / 2.5 V / 3.3 V / 5.0 V) | β |
| Technology | CMOS EEPROM | β |
| In-System Programming | Yes (IEEE 1149.1 JTAG) | IEEE Std. 1532 compliant (JTAG) |
| Package | 44-pin TQFP (10x10 mm) | 44-pin TQFP |
| Operating Temperature | 0 Β°C to +70 Β°C (commercial, 'C' grade) | 0C to +70C (Commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL Level] | β |
| RoHS Status | Compliant | Compliant |
| Lead-Free | Yes | β |
| Device Type | β | CPLD - Complex Programmable Logic Device |
| Usable Gates | β | 600 |
| Macrocells | β | 32 |
| Logic Array Blocks (LABs) | β | 2 |
| User I/O Pins | β | 34 |
| Pin-to-Pin Delay (tPD) | β | 10 ns |
| Maximum Counter Frequency (fCNT) | β | 103.1 MHz |
| Programming Technology | β | EEPROM (non-volatile) |
| MultiVolt I/O Support | β | 1.8 V / 2.5 V / 3.3 V |
| Open-Drain Output Option | β | Yes (per I/O pin) |
| Programmable Security Bit | β | Yes |