EPM3032ATC44-10NAB vs EPM3032ATC44-10N Comparison

Detailed side-by-side comparison of EPM3032ATC44-10NAB by Intel and EPM3032ATC44-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3032ATC44-10NAB EPM3032ATC44-10N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Product Family MAX 3000A —
Device Type CPLD (Complex Programmable Logic Device) —
Logic Elements / Macrocells 32 macrocells —
Usable Gates 600 600
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Operating Frequency 103.1 MHz (per Arrow listing) —
Number of User I/O 34 (max for 44-pin TQFP package) —
Core Supply Voltage (VCCINT) 3.3 V 3.3 V
I/O Supply Voltage (VCCIO) 3.3 V (MultiVolt I/O compatible with 5.0 V, 3.3 V, 2.5 V logic) —
Package 44-pin TQFP 44-pin TQFP
Mounting Type Surface Mount Surface Mount
Programming Interface JTAG (IEEE Std. 1149.1 / IEEE Std. 1532 ISP) —
Configuration Memory Non-volatile EEPROM EEPROM (non-volatile, instant-on)
Hot-Socketing Support Yes —
Operating Temperature [DATA_NEEDED: operating temperature range] —
RoHS Status Compliant (per -NAB suffix convention) Compliant (lead-free)
Delivery Form Tray ('AB' suffix per Altera order code convention) —
Process Technology CMOS, EEPROM-based —
Series — MAX 3000A
Device Family — CPLD - Complex Programmable Logic Device
Macrocells — 32
Logic Array Blocks (LABs) — 2
User I/O Pins — 34
Pin-to-Pin Logic Delay (tPD) — 10 ns
Maximum Counter Frequency (fCNT) — 138.9 MHz
I/O Logic Level Support — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
In-System Programmability — Yes, IEEE 1149.1 JTAG
ISP Standard Compliance — IEEE Std. 1532
Open-Drain I/O Option — Yes, per pin
Operating Temperature (Commercial) — 0 C to +70 C

Datasheets & Resources

Browse All Products Create BOM Request Quote