EPM3064ALC44-4 vs EPM3064ALC44-10N Comparison

Detailed side-by-side comparison of EPM3064ALC44-4 by Altera and EPM3064ALC44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ALC44-4 EPM3064ALC44-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Manufacturer Altera (Intel Programmable Solutions Group) —
Part Family MAX 3000A —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 64 64
Logic Array Blocks (LABs) 2 4
User I/O Pins 34 34
Pin-to-Pin Delay (tPD) 4.5 ns —
Propagation Delay 4.5 ns (max) —
Supply Voltage - Internal (VCCINT) 3.3 V —
Supply Voltage - I/O (VCCIO) 2.5 V / 3.3 V / 5.0 V —
In-System Programmability Yes (IEEE 1149.1 JTAG, 3.3-V ISP) Yes (IEEE 1149.1 JTAG, IEEE 1532 compliant)
Program Memory Type EEPROM (non-volatile) —
Package / Case 44-LCC (J-Lead), PLCC-44 —
Mounting Type Surface Mount (PLCC J-Lead, socket-compatible) Surface Mount (PLCC socket compatible)
Operating Temperature Grade Commercial —
Terminal Form J BEND —
Package Code QCCJ (J-Lead Chip Carrier) —
Package Shape Square —
Number of Terminals 44 —
Technology CMOS EEPROM —
RoHS Status [DATA_NEEDED: rohs status] Compliant
Product Family — MAX 3000A
Usable Gates — 1,250
Propagation Delay (tPD) — 10 ns
Maximum Counter Frequency — 227.3 MHz
Supply Voltage (VCCINT) — 3.0 V to 3.6 V
I/O Bank Voltage (VCCIO) — 3.0 V to 3.6 V (MultiVolt)
Configuration Memory — CMOS EEPROM
Package — 44-pin PLCC (LC44)
Operating Temperature — [DATA_NEEDED: commercial / industrial grade]
Open-Drain Output Option — Yes (per I/O pin)
Output Slew-Rate Control — Programmable

Datasheets & Resources

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