EPM3064ALI44-10N vs EPM3064ATI44-10N Comparison

Detailed side-by-side comparison of EPM3064ALI44-10N by Altera and EPM3064ATI44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ALI44-10N EPM3064ATI44-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status NRND Obsolete
Series MAX 3000A —
Programmable Type In System Programmable (ISP) In-System Programmable (EEPROM)
Number of Macrocells 64 —
Number of I/O 34 —
Logic Gates 1250 gates —
Number of Logic Elements/Blocks 4 LABs —
Propagation Delay (tPD) 10 ns (speed grade -10) —
Counter Frequency up to 227.3 MHz —
Supply Voltage - Core 3.3 V —
I/O Logic Level Support 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
Programming Interface IEEE Std. 1149.1 JTAG —
Operating Temperature -40 C to +85 C (Industrial) -40C to +85C (Industrial, "N" suffix)
Package 44-pin PLCC (J-Lead) 44-pin TQFP
Mounting Type Surface Mount (socketable PLCC) Surface Mount
Lead Free / RoHS Status Lead Free, RoHS Compliant —
Hot-Socketing Support Yes —
Configuration Memory CMOS EEPROM (non-volatile) —
Family — MAX 3000A
Product Type — CPLD (Complex Programmable Logic Device)
Macrocells — 64
Usable Gates — 1250
User I/Os — 34
Dedicated Inputs — 4
Logic Blocks — 4
Pin-to-Pin Delay — 10 ns (-10 speed grade)
Maximum Frequency (fMAX) — 100 MHz
ISP Interface — IEEE Std. 1149.1 (JTAG)
ISP Standard Compliance — IEEE Std. 1532
Core Supply Voltage (VCCINT) — 3.3 V
I/O Supply Voltage (VCCIO) — 3.3 V or 2.5 V (MultiVolt)
Process Technology — CMOS EEPROM
Boundary-Scan Test — Built-in (JTAG)
Lead-Free Status — Contains Lead (per digchip datasheet excerpt)
RoHS Status — Non-Compliant (per digchip datasheet excerpt)

Datasheets & Resources

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