EPM3064ATC100-10NA vs EPM3064ATC100-10 Comparison

Detailed side-by-side comparison of EPM3064ATC100-10NA by Intel and EPM3064ATC100-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ATC100-10NA EPM3064ATC100-10
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active NRND
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 64 64
User I/Os 66 —
Usable Gates 1,250 —
Logic Array Blocks (LABs) 4 —
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Operating Frequency [DATA_NEEDED: fMAX in MHz] —
Supply Voltage (VCCINT) 3.3 V 3.3 V
MultiVolt I/O Voltages 2.5 V / 3.3 V / 5.0 V —
Package TQFP-100 (0.5 mm pitch) TQFP-100 (100-pin Thin Quad Flat Pack)
Configuration Memory Non-volatile EEPROM —
In-System Programming IEEE Std. 1532 compliant —
Boundary-Scan Test IEEE Std. 1149.1 (JTAG) —
Operating Temperature 0C to +70C (commercial) —
Lead-Free / RoHS Yes (NA suffix) —
Logic Gates — 1250 gates
Logic Array Blocks — 2
User I/O Pins — 34
Propagation Delay (tPD) — 10 ns
Process Technology — CMOS EEPROM
In-System Programmability — IEEE Std. 1149.1 (JTAG) and IEEE Std. 1532 compliant
Global Clock Signals — 2 (with optional inversion)
Output Enable Signals — 6 or 10 pin- or logic-driven
Output Slew-Rate Control — Programmable
Operating Temperature Grade — Commercial
MultiVolt I/O Support — 1.5V / 1.8V / 2.5V / 3.3V interfaces
RoHS Status — [DATA_NEEDED: RoHS compliance]

Datasheets & Resources

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