EPM3064ATC100-4N vs EPM3064ATI100-10 Comparison
Detailed side-by-side comparison of EPM3064ATC100-4N by Altera and EPM3064ATI100-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM3064ATC100-4N | EPM3064ATI100-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macro Cells | 64 | — |
| Logic Array Blocks | 2 | — |
| Usable Gates | 1,250 | 1,250 |
| User I/O Pins | 66 | — |
| Pin-to-Pin Delay (tPD) | 4.5 ns | — |
| Counter Frequency | 222.2 MHz (max) | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| Package | 100-pin TQFP | 100-pin TQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | IEEE Std. 1149.1 JTAG (ISP) | IEEE Std. 1149.1 JTAG |
| ISP Standard | IEEE Std. 1532 | — |
| Operating Temperature | 0C to +70C (commercial) | — |
| Process Technology | CMOS EEPROM | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-Compliant |
| Number of Macrocells | — | 64 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Number of User I/Os | — | 66 |
| Supply Voltage | — | 3.3 V |
| Speed Grade | — | -10 (10 ns pin-to-pin) |
| Programmable Type | — | In-System Programmable (EEPROM) |
| Operating Temperature Grade | — | Industrial |
| Lead Free Status | — | Contains Lead |