EPM3064ATC44-10 vs EPM3064ATC44-4N Comparison
Detailed side-by-side comparison of EPM3064ATC44-10 by Altera and EPM3064ATC44-4N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM3064ATC44-10 | EPM3064ATC44-4N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | MAX 3000A | MAX 3000A |
| Logic Elements / Macrocells | 64 macrocells | — |
| Usable Gates | 1,250 | 1,250 |
| Number of Logic Blocks / LABs | 4 LABs | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Internal Frequency | 227.3 MHz (counter speed) | — |
| Programmable I/Os | 34 | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | 3.3 V |
| I/O Bank Voltage (VCCIO) | MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Technology | CMOS EEPROM, 5 V tolerant I/O | — |
| In-System Programming | IEEE Std. 1532 (JTAG) | — |
| Boundary-Scan Support | IEEE 1149.1 (JTAG) | — |
| Package | TQFP-44, 10 x 10 mm, 0.8 mm pitch | 44-pin TQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Range | 0C to +70C (commercial) | — |
| RoHS Status | Non-compliant (legacy Altera, Pb-bearing) | [DATA_NEEDED: rohs status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 64 |
| Logic Array Blocks | — | 2 |
| Number of I/Os | — | 34 |
| Dedicated Inputs | — | 4 |
| Propagation Delay (tpd) | — | 4.5 ns |
| Maximum Counter Frequency | — | 222.2 MHz |
| I/O Supply Voltage (VCCIO) | — | 2.5 V or 3.3 V |
| Programmability | — | EEPROM, in-system programmable (JTAG) |
| JTAG Support | — | IEEE Std. 1149.1 (boundary-scan) and IEEE Std. 1532 (ISP) |
| Operating Temperature | — | 0C to +70C (commercial) |