EPM3064ATI44-10NAD vs EPM3064ATI44-10N Comparison
Detailed side-by-side comparison of EPM3064ATI44-10NAD by Altera and EPM3064ATI44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3064ATI44-10NAD - MAX 3000A 64-Macrocell CPLD 44-TQFP | Altera
EPM3064ATI44-10NAD ObsoleteSpecification Comparison
| Parameter | EPM3064ATI44-10NAD | EPM3064ATI44-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 64 | 64 |
| Usable Gates | 1,250 | 1250 |
| Logic Array Blocks (LABs) | 4 (16 macrocells each) | — |
| User I/Os (max) | 34 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Setup Time (tSU) | 4.5 ns | — |
| Core Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| Package | TQFP-44 | 44-pin TQFP |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C (Industrial, "N" suffix) |
| Programming Interface | JTAG (IEEE Std. 1532 compliant) | — |
| In-System Programmable | Yes | — |
| RoHS Status | Compliant | Non-Compliant (per digchip datasheet excerpt) |
| Mounting Type | Surface Mount | Surface Mount |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| User I/Os | — | 34 |
| Dedicated Inputs | — | 4 |
| Logic Blocks | — | 4 |
| Pin-to-Pin Delay | — | 10 ns (-10 speed grade) |
| Maximum Frequency (fMAX) | — | 100 MHz |
| Programmable Type | — | In-System Programmable (EEPROM) |
| ISP Interface | — | IEEE Std. 1149.1 (JTAG) |
| ISP Standard Compliance | — | IEEE Std. 1532 |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V (MultiVolt) |
| Process Technology | — | CMOS EEPROM |
| Boundary-Scan Test | — | Built-in (JTAG) |
| Lead-Free Status | — | Contains Lead (per digchip datasheet excerpt) |