EPM3512AFC256C vs EPM3512AFC256-5C Comparison

Detailed side-by-side comparison of EPM3512AFC256C by Intel and EPM3512AFC256-5C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFC256C EPM3512AFC256-5C
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy Obsolete
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 512 512
Logic Array Blocks (LABs) 16 —
Maximum User I/Os 208 —
Dedicated Input Pins 12 —
Package 256-ball FineLine BGA (FC) 256-ball FBGA, 17 mm × 17 mm, 1.0 mm pitch
Operating Temperature 0C to +70C (Commercial) 0 °C to +70 °C (commercial, "C" grade)
Speed Grade C (per datasheet ordering code) —
Configuration Technology EEPROM (non-volatile, instant-on) —
Core Voltage 3.3 V —
I/O Standards Supported MultiVolt: 5.0 V, 3.3 V, 2.5 V —
JTAG Support IEEE 1149.1 Boundary Scan —
PCI Compliance PCI SIG Local Bus Specification Revision 2.2 —
Programming In-system programmable via JTAG —
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Mounting Type Surface Mount Surface Mount
Usable Gates — 10,000
Maximum Operating Frequency — 95.2 MHz
Pin-to-Pin Delay (tPD) — 5 ns
Supply Voltage - Core (VCCINT) — 3.3 V
I/O Voltage (VCCIO) — 2.5 V / 3.3 V / 5.0 V (banked MultiVolt I/O)
User I/O Pins — 212 (max)
Programming Interface — IEEE Std. 1532 / JTAG (4-wire) in-system programmable
Technology — EEPROM-based macrocell, non-volatile

Datasheets & Resources

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