EPM3512AQC208-15N vs EPM3512AQC208-2 Comparison

Detailed side-by-side comparison of EPM3512AQC208-15N by Altera and EPM3512AQC208-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3512AQC208-15N EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera

EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera

EPM3512AQC208-15N ⚠ Last Time Buy

Specification Comparison

Parameter EPM3512AQC208-15N EPM3512AQC208-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $20.50 $18.75
Family MAX 3000A MAX 3000A
Device Type CPLD - Complex Programmable Logic Device β€”
Macro Cells 512 β€”
Logic Array Blocks (LABs) 16 16
Maximum User I/O Pins 172 β€”
Typical Usable Gates 12,000 β€”
Number of Logic Elements 512 β€”
Pin-to-Pin Delay (tPD) 15 ns β€”
Operating Supply Voltage (VCCINT) 3.3 V β€”
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V (MultiVolt) β€”
Programmable I/O Standards LVTTL, LVCMOS, PCI (with external resistor) β€”
In-System Programmability Yes (IEEE Std. 1532 compliant) Yes (IEEE 1149.1 JTAG)
Configuration Memory EEPROM (non-volatile) β€”
JTAG Support Yes (BST/Boundary-Scan Test) β€”
Package PQFP-208 (QC208) PQFP-208 (QC)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +70C (commercial) β€”
RoHS Status [DATA_NEEDED: RoHS status] Non-compliant (legacy PQFP)
Macrocells β€” 512
User I/O Pins β€” 172
Speed Grade β€” -2
Supply Voltage (Core) β€” 3.3 V
Output Drive Voltage β€” 2.5 V / 3.3 V programmable
Input Voltage Tolerance β€” 2.5 V / 3.3 V / 5.0 V
Process Technology β€” 0.30 Β΅m EEPROM
Program/Erase Endurance β€” 100 cycles (typical)
User I/O Banks β€” 4
Operating Temperature Range β€” Commercial (0C to +70C)
Lead-Free β€” No (SnPb lead finish)
Security Bit β€” Yes (programmable)

Datasheets & Resources

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