EPM5016DI-20 vs EPM5016LC-17 Comparison
Detailed side-by-side comparison of EPM5016DI-20 by Altera and EPM5016LC-17 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5016DI-20 | EPM5016LC-17 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 EPLD |
| Device Type | EPLD (UV-erasable CMOS) | — |
| Macrocells | 16 | 16 |
| Propagation Delay (tPD) | 20 ns | 17 ns |
| Maximum Clock Frequency | 62.5 MHz | — |
| Total Inputs | 16 | — |
| Dedicated Inputs | 7 | 7 |
| Configurable I/O Pins | 8 | — |
| External Clock Inputs | 1 | 1 |
| Product Terms per Output | 8 | — |
| Output Functions per Macrocell | 8 | — |
| Technology | CMOS EPROM | CMOS, UV-erasable |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | — |
| Package | 20-pin Ceramic DIP (DI), windowed | Windowed Ceramic DIP (LC) |
| Speed Grade | -20 (20 ns tPD) | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: temperature grade] |
| Supply Voltage | [DATA_NEEDED: VCC nominal] | [DATA_NEEDED: VCC range] |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Product Terms | — | 160 |
| I/O Pins | — | 8 |
| Total Input Pins | — | 16 |
| Outputs | — | 8 |
| Architecture | — | PAL-type with Programmable Interconnect Array (PIA) |
| Logic Compatibility | — | TTL/CMOS |