EPM5130WC-1 vs EPM5130LC Comparison

Detailed side-by-side comparison of EPM5130WC-1 by Intel and EPM5130LC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5130WC-1 EPM5130LC
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Series MAX 5000 MAX 5000
Manufacturer Altera (now Intel) —
Device Type CPLD (Complex Programmable Logic Device) —
Macrocell Count 128 —
Logic Array Blocks Multiple LABs (per MAX 5000 architecture) —
Propagation Delay (tpd) 40 ns —
Maximum Clock Frequency 50 MHz —
Erasure Method UV (ultraviolet, windowed package) —
Process Technology CMOS EPROM CMOS (0.7 um EPROM)
User I/O Pins Up to 100 48
Package Type 100-pin Ceramic QFP (Windowed) —
Operating Temperature [DATA_NEEDED: operating temperature range] [DATA_NEEDED: commercial/industrial/military grade]
Supply Voltage [DATA_NEEDED: VCC nominal] —
Programmable Yes (UV-erasable, non-volatile) —
Logic Family MAX 5000 (Altera) —
Configuration Memory EPROM (on-chip) —
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: RoHS compliance] Non-compliant (ceramic JLCC, contains lead)
Family — MAX 5000 (EPM51xx)
Macrocells — 128
Logic Array Blocks (LABs) — 8
Total Inputs (Dedicated + I/O) — 68
Dedicated Inputs — 19
Propagation Delay (tPD) — 55 ns
Maximum Internal Clock Frequency — 50 MHz
Global Clock Inputs — 1
Configuration Technology — UV-Erasable / OTP EPROM
Supply Voltage (VCC) — 4.5 V to 5.5 V
I/O Standard — TTL-compatible
Package — JLCC-68 (J-Lead Ceramic Chip Carrier)

Datasheets & Resources

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