EPM5192AGC-20 vs EPM5192AJI84-20 Comparison
Detailed side-by-side comparison of EPM5192AGC-20 by Intel and EPM5192AJI84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192AGC-20 | EPM5192AJI84-20 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | EPLD (EEPLD, UV-erasable) | UV-Erasable / OTP Complex PLD |
| Macrocells | 192 | — |
| Usable Gates | 12,000 | — |
| Propagation Delay (tPD) | 20 ns | 33 ns |
| Counter Frequency (fCNT) | 100 MHz (max) | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V nominal (4.5 V to 5.5 V) |
| Logic Array Blocks (LABs) | 8 | — |
| Dedicated I/O Pins | 96 | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| In-System Programmability | Yes (5 V ISP) | — |
| Security Bit | Yes (pattern read-back protected) | — |
| Package | PGA-132 (ceramic windowed, 'GC') | — |
| Mounting Type | Through-hole (PGA socket) | Surface Mount |
| Operating Temperature | 0C to 70C (commercial) | — |
| RoHS Status | [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS] | [DATA_NEEDED: RoHS status of EPM5192AJI84-20] |
| Device Family | — | MAX 5000 (EPM5192) |
| Logic Cells / Macrocells | — | 192 macrocells |
| Maximum Frequency (fCNT) | — | 66.7 MHz |
| Process Technology | — | CMOS |
| Operating Temperature Grade | — | Industrial |
| Package Code | — | WQCCJ (JEDEC) |
| Package Type | — | 84-pin J-bend Ceramic Chip Carrier (PLCC-84, JI) |
| Terminal Form | — | J-Bend |
| Number of Terminals | — | 84 |
| Programmability | — | UV-erasable window + OTP |
| Pin Count | — | 84 |
| Lifecycle Status | — | Obsolete (legacy Altera MAX 5000) |