EPM5192AJI84-20 vs EPM5192ALC84-20 Comparison
Detailed side-by-side comparison of EPM5192AJI84-20 by Altera and EPM5192ALC84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192AJI84-20 | EPM5192ALC84-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | MAX 5000 (EPM5192) | — |
| Logic Cells / Macrocells | 192 macrocells | — |
| Device Type | UV-Erasable / OTP Complex PLD | UV-Erasable/OTP Complex PLD (EPLD) |
| Propagation Delay (tPD) | 33 ns | — |
| Maximum Frequency (fCNT) | 66.7 MHz | — |
| Supply Voltage (VCC) | 5 V nominal (4.5 V to 5.5 V) | — |
| Process Technology | CMOS | CMOS |
| Operating Temperature Grade | Industrial | — |
| Package Code | WQCCJ (JEDEC) | QCCJ (PLCC-84) |
| Package Type | 84-pin J-bend Ceramic Chip Carrier (PLCC-84, JI) | — |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket-compatible) |
| Terminal Form | J-Bend | J-bend |
| Number of Terminals | 84 | — |
| Programmability | UV-erasable window + OTP | — |
| Pin Count | 84 | — |
| Lifecycle Status | Obsolete (legacy Altera MAX 5000) | — |
| RoHS Status | [DATA_NEEDED: RoHS status of EPM5192AJI84-20] | [DATA_NEEDED: RoHS status not in provided web data] |
| Series | — | Altera MAX 5000 |
| Macrocells | — | 192 |
| Speed Grade | — | -20 (20 ns pin-to-pin delay) |
| Package | — | 84-pin PLCC (Plastic Leaded Chip Carrier) |
| Terminal Pitch | — | 1.270 mm |
| Package Shape | — | Square |
| Temperature Grade | — | Commercial |
| Programming Method | — | UV-erase + EPROM (One-Time-Programmable option) |
| Logic Family | — | MAX 5000 EPLD |
| I/O Compatibility | — | TTL-compatible |
| Configuration Memory | — | EPROM (UV-erasable) |