EPM5192ALC84-20 vs EPM5192AJC84-20 Comparison
Detailed side-by-side comparison of EPM5192ALC84-20 by Altera and EPM5192AJC84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5192AJC84-20 - 192-Macrocell UV PLD, 33ns, 84-Pin J-Lead | Altera
EPM5192AJC84-20 ObsoleteSpecification Comparison
| Parameter | EPM5192ALC84-20 | EPM5192AJC84-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Type | UV-Erasable/OTP Complex PLD (EPLD) | UV-erasable/OTP Complex PLD (CPLD) |
| Series | Altera MAX 5000 | — |
| Macrocells | 192 | 192 |
| Process Technology | CMOS | CMOS, UV-erasable EEPROM |
| Speed Grade | -20 (20 ns pin-to-pin delay) | — |
| Package | 84-pin PLCC (Plastic Leaded Chip Carrier) | 84-pin PLCC J-Lead (WQCCJ, J84) |
| Terminal Pitch | 1.270 mm | — |
| Terminal Form | J-bend | — |
| Package Code | QCCJ (PLCC-84) | — |
| Package Shape | Square | — |
| Temperature Grade | Commercial | — |
| Programming Method | UV-erase + EPROM (One-Time-Programmable option) | — |
| Logic Family | MAX 5000 EPLD | — |
| I/O Compatibility | TTL-compatible | — |
| Mounting Type | Surface Mount (PLCC socket-compatible) | Surface Mount (J-Lead) |
| Configuration Memory | EPROM (UV-erasable) | — |
| RoHS Status | [DATA_NEEDED: RoHS status not in provided web data] | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 5000 |
| Propagation Delay (tpd) | — | 33 ns (speed grade -20) |
| Maximum Clock Frequency | — | 66.7 MHz |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V |
| Dedicated Inputs | — | 7 |
| User I/O Lines | — | 64 |
| Operating Temperature Grade | — | Commercial |
| MSL Level | — | [DATA_NEEDED: MSL level] |
| Programming Tool | — | Altera MAX+PLUS II / Quartus (legacy) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |