EPM5192ALC84-20 vs EPM5192ALM84-20 Comparison

Detailed side-by-side comparison of EPM5192ALC84-20 by Altera and EPM5192ALM84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192ALC84-20 EPM5192ALM84-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Device Type UV-Erasable/OTP Complex PLD (EPLD) UV-Erasable/OTP Complex PLD (CPLD)
Series Altera MAX 5000 —
Macrocells 192 192
Process Technology CMOS CMOS
Speed Grade -20 (20 ns pin-to-pin delay) —
Package 84-pin PLCC (Plastic Leaded Chip Carrier) 84-pin PQCC (PLCC), J-Lead, surface-mount
Terminal Pitch 1.270 mm —
Terminal Form J-bend —
Package Code QCCJ (PLCC-84) —
Package Shape Square —
Temperature Grade Commercial —
Programming Method UV-erase + EPROM (One-Time-Programmable option) —
Logic Family MAX 5000 EPLD —
I/O Compatibility TTL-compatible —
Mounting Type Surface Mount (PLCC socket-compatible) —
Configuration Memory EPROM (UV-erasable) EPROM (UV-erasable, windowless in this package)
RoHS Status [DATA_NEEDED: RoHS status not in provided web data] unknown (legacy Altera part)
Family — MAX 5000
User I/O Pins — 64
Dedicated Inputs — 7
Total Inputs — 71 (64 I/O + 7 dedicated)
Maximum Clock Frequency — 66.7 MHz
Propagation Delay (tPD) — 33 ns
Programmable Security Bit — Yes
Logic Voltage Compatibility — 5 V TTL
Operating Temperature — [DATA_NEEDED: commercial/industrial/military grade]

Datasheets & Resources

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