EPM570T144I5N vs EPM570GT144C5N Comparison
Detailed side-by-side comparison of EPM570T144I5N by Intel and EPM570GT144C5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM570T144I5N | EPM570GT144C5N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.50 | $14.20 |
| Family | MAX II | MAX II |
| Logic Elements | 570 LE | — |
| Macrocells | 440 | — |
| Maximum Pin-to-Pin Delay (tPD1) | 8.7 ns | — |
| Maximum Frequency (fCNT) | 304 MHz | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Supply Voltage - Core (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Operating Temperature | -40C to +100C (industrial) | — |
| Speed Grade | I5N | — |
| Process Technology | 0.18 um CMOS, 6-layer-metal flash | 0.18 µm |
| Package | TQFP-144 (22 mm x 22 mm, 0.5 mm pitch) | 144-pin TQFP (20 x 20 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / IEEE 1532 ISP |
| Boundary-Scan Test | IEEE 1149.1 compliant | — |
| RoHS Status | Compliant | Compliant |
| Logic Elements / Macrocells | — | 440 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Propagation Delay (tPD) | — | 5.4 ns |
| Maximum Internal Frequency (fMAX) | — | 201.1 MHz |
| User Flash Memory | — | 8 Kbits |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Bank Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Operating Temperature Range | — | 0 °C to +85 °C (Commercial) |
| Configuration Time (Instant-On) | — | < 1 ms |
| Supported I/O Standards | — | LVCMOS, LVTTL, PCI, SSTL-2, SSTL-3 |