EPM7096QI100-15 vs EPM7096QC100-7 Comparison
Detailed side-by-side comparison of EPM7096QI100-15 by Altera and EPM7096QC100-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7096QI100-15 - MAX 7000 CPLD 96 Macro 76 I/O 15ns | Altera
EPM7096QI100-15 ⚠ Last Time BuySpecification Comparison
| Parameter | EPM7096QI100-15 | EPM7096QC100-7 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last Time Buy | Last Time Buy |
| Series | MAX 7000 | MAX 7000 |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Programmable Type | EE PLD (EEPROM-based, in-system programmable) | EE PLD (EEPROM-based, in-system programmable) |
| Number of Macrocells | 96 | — |
| Number of Logic Array Blocks (LABs) | 4 | — |
| Number of Usable Gates | 1,800 | — |
| Number of I/O Pins | 76 | — |
| Maximum Propagation Delay (tPD) | 15 ns | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | — |
| Operating Temperature | -40C to +85C (industrial, per Q-suffix) | 0C to +70C (commercial) |
| Package / Case | 100-BQFP (BQFP-100) | 100-BQFP (PQFP-100, 20x14 mm, 0.65 mm pitch) |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | IEEE Std. 1149.1 JTAG (ISP) | JTAG (IEEE 1149.1) / ByteBlaster |
| Packaging | Tray | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance status not stated in verified data] | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 7000 |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 96 |
| User I/Os | — | 76 |
| Logic Elements / Gates | — | 1800 gates (typical) |
| Pin-to-Pin Delay (tPD) | — | 7.5 ns |
| Maximum Frequency (fMAX) | — | 125 MHz |
| Supply Voltage - Internal | — | 4.75 V to 5.25 V |
| Supplier Device Package | — | 100-PQFP (20x14) |
| Program Memory | — | EEPROM (non-volatile, in-system programmable) |