EPM7160SQC160-10 vs EPM7160SQC160-10N Comparison
Detailed side-by-side comparison of EPM7160SQC160-10 by Altera and EPM7160SQC160-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7160SQC160-10 - MAX 7000S CPLD, 160 Macro Cells, 100MHz, PQFP-160 | Intel / Altera
EPM7160SQC160-10 ObsoleteSpecification Comparison
| Parameter | EPM7160SQC160-10 | EPM7160SQC160-10N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | MAX 7000S | MAX 7000S |
| Macro Cells | 160 | 160 |
| Logic Elements / Gates | 3,200 usable gates | — |
| User I/Os | 104 | — |
| Logic Array Blocks (LABs) | 10 | — |
| Maximum Operating Frequency | 100 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT) | 5.0 V | 5.0 V |
| I/O Voltage Tolerance | 5.0 V | — |
| Programming Technology | EEPROM, in-system programmable | — |
| JTAG Support | IEEE 1149.1 (boundary-scan + ISP) | — |
| Package | PQFP-160 (SQC160) | PQFP-160 (SQC) 31.2 x 31.2 mm |
| Operating Temperature | 0 C to +70 C (commercial) | 0 C to 70 C (Commercial) |
| Logic Family | CMOS | — |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | CMOS, EEPROM-based | — |
| RoHS Status | unknown | Non-Compliant (Pb-bearing PQFP) |
| Lead-Free | unknown | — |
| Usable Gates | — | 3,200 |
| Logic Elements / Blocks | — | 10 Logic Array Blocks (LABs) |
| User I/O Pins | — | 104 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Internal Frequency | — | 167 MHz |
| Counter Speed (fCNT) | — | 100 MHz |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| Memory Technology | — | EEPROM |