EPM7160SQC160-10N vs EPM7160EQC160-12 Comparison
Detailed side-by-side comparison of EPM7160SQC160-10N by Intel and EPM7160EQC160-12 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7160SQC160-10N | EPM7160EQC160-12 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Active |
| Family | MAX 7000S | MAX 7000E |
| Macro Cells | 160 | — |
| Usable Gates | 3,200 | 3,200 |
| Logic Elements / Blocks | 10 Logic Array Blocks (LABs) | — |
| User I/O Pins | 104 | 104 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Internal Frequency | 167 MHz | — |
| Counter Speed (fCNT) | 100 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | 5.0 V |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | Yes (JTAG IEEE 1149.1) |
| Operating Temperature | 0 C to 70 C (Commercial) | 0 °C to +70 °C (Commercial) |
| Package | PQFP-160 (SQC) 31.2 x 31.2 mm | PQFP-160 (EQC), Gull-Wing |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Non-Compliant (Pb-bearing PQFP) | [DATA_NEEDED: RoHS status] |
| Memory Technology | EEPROM | — |
| Macrocells | — | 160 |
| Logic Array Blocks (LABs) | — | 4 |
| Pin-to-Pin Logic Delay (tPD) | — | 12 ns |
| I/O Voltage | — | 5.0 V |
| Non-volatile Configuration | — | EEPROM |
| Global Clocks | — | 4 |
| MSL Level | — | [DATA_NEEDED: MSL level] |