EPM7192SQC160-15 vs EPM7160SQC160-10 Comparison
Detailed side-by-side comparison of EPM7192SQC160-15 by Altera and EPM7160SQC160-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7160SQC160-10 - MAX 7000S CPLD, 160 Macro Cells, 100MHz, PQFP-160 | Intel / Altera
EPM7160SQC160-10 ObsoleteSpecification Comparison
| Parameter | EPM7192SQC160-15 | EPM7160SQC160-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.75 | $12.20 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD - Complex Programmable Logic Device | β |
| Number of Macrocells | 192 | β |
| Number of Logic Array Blocks | 4 | β |
| Number of Usable Gates | 3750 | β |
| User I/O Pins | 124 | β |
| Pin-to-Pin Logic Delay (tPD) | 15 ns | β |
| Maximum Operating Frequency | 76.9 MHz | 100 MHz |
| Supply Voltage | 5.0 V | β |
| Programmability | In-System (ISP) via JTAG IEEE Std 1149.1 | β |
| Configuration Memory | EEPROM, non-volatile | β |
| Package | PQFP-160 | PQFP-160 (SQC160) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | β |
| Process Technology | CMOS, EEPROM-based | CMOS, EEPROM-based |
| Macro Cells | β | 160 |
| Logic Elements / Gates | β | 3,200 usable gates |
| User I/Os | β | 104 |
| Logic Array Blocks (LABs) | β | 10 |
| Pin-to-Pin Propagation Delay (tPD) | β | 10 ns |
| Supply Voltage (VCCINT) | β | 5.0 V |
| I/O Voltage Tolerance | β | 5.0 V |
| Programming Technology | β | EEPROM, in-system programmable |
| JTAG Support | β | IEEE 1149.1 (boundary-scan + ISP) |
| Operating Temperature | β | 0 C to +70 C (commercial) |
| Logic Family | β | CMOS |
| RoHS Status | β | unknown |
| Lead-Free | β | unknown |